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Hybrid interconnects for on-chip communication: A solution with low latency and efficient energy consumption

Technology #016-017-sorger

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Point-to-point LatencyEnergy consumption
Shuai Sun
Volker J. Sorger
Managed By
Jerry Comanescu
Licensing Associate (202) 994-8975
Patent Protection

Provisional Patent Application Filed
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P2P latency [JPG]
Energy Consumption [JPG]

  As computer chip feature sizes continue to decrease, power consumed due to on-chip communications will dramatically grow. This calls for new techniques which can provide higher bandwidth and data rates than over traditional electrical interconnects.

  Photonic interconnects can provide higher bandwidth and data rates. However optoelectronic devices generally require more power and a large footprint. Conversely, plasmonic interconnects can provide energy efficiency and small footprint, but have lower bandwidth and data rates. To overcome these problems the George Washington University (GW) inventors designed hybrid photonic and plasmonic interconnects that retain the best features of both individual solutions. The GW inventors then modeled hybrid performance against pure photonic and pure plasmonic interconnects. Hybrid interconnects are better in terms of point-to-point latency and energy consumption as shown by the graphs below.

Point-to-point latency: Time required for the propagation of a single bit from one light source across the link to detection by the photoreceiver.


·  Communication links in optical circuits including processors/co-processors

·  Large organizations with many computer systems

·  Servers with many service requests


·  Speed: outperforms traditional electrical interconnects

·  Energy-efficient

Patent Status:

·  Marketing Provisional


Jerry Comanescu, Ph.D.- Esq.

Licensing Associate

Technology Commercialization Office
The George Washington University
Phone: 202-994-5866